In image sensors, charge frequently needs to be transferred between a plurality of different nodes. For example, in a global shutter complementary metal oxide semiconductor (CMOS) image sensor, charge accumulated in a photodiode from incident photons may need to be transferred from the photodiode to a storage node, and then, subsequently, to a floating diffusion node for global shutter read out.
In order to accomplish the charge transfer from one node to another node, the nodes are frequently designed such that during operation, the node to which the charge is to be transferred (i.e., the destination node) has a greater electric potential than the node from which the charge is to be transferred (i.e., the source node). A transistor may be coupled between the two nodes, with the transistor controlling the electric potential of a region between the nodes such that a barrier can be created and removed responsive to a transfer signal provided to the transistor's input gate. When the barrier between two nodes is removed, the charge typically flows to the node with the higher potential until that node is “full,” and any remaining charge may spill back into the other node. Thus, in order to fully transfer charge from one node to another, the destination node may need to have a potential that is greater than the potential of the source node by an amount equal to or exceeding the amount of charge to be transferred. In other words, the destination node may need to have sufficient well capacity to hold the charge from the source node without sharing the charge back with the source node when the barrier between the nodes is removed. In order to achieve full charge transfer between a plurality of nodes, the electric potential is thus increased for successive nodes, with the increase in electric potential between each successive node generally equaling or exceeding the full well capacity for the pixel.
Increasing the potential for each successive node, however, typically requires higher power supply voltages to be provided to the image sensor. The higher power supply voltage may result in higher power consumption, may require specialized processes to manufacture, and/or may require mitigation of electrostatic discharge issues. Alternatively, rather than using higher power supply voltages to obtain the higher potentials for each successive node, the conversion gain between nodes may be reduced. Reducing the conversion gain, however, may result in more noise and less sensitivity in operation of the image sensor.
Some recent improvements in image sensor pixel design include additional nodes in image sensor pixels—for example, an image sensor formed by having two or more silicon chips stacked together. The interconnections between the silicon chips may require additional contacts and storage nodes for charge to be transferred between the silicon chips. The additional nodes exacerbate the need to increase the potential of subsequent storage nodes.